USS Clueless Stardate 20010920.1317

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Stardate 20010920.1317 (On Screen): I suppose that no-one else cares about the RAMBUS war except me, but I'm going to indulge myself here. Via just introduced a chipset for the P4 which permits use of DDR-SDRAM and preliminary reports indicates that it performs as well as Intel's i850, and much better than the emasculated i845, while resulting in a system which costs vastly less than the i850 and about the same as the i845. The big problem is that DDR runs at 266 MHz while the P4 bus runs at 400 MHz; that results in beating which punishes performance a bit. Via has been making chipsets which can run memory and CPU at different speeds for a long time, but there's always a performance hit associated with that. The real problem was that the P4 was really designed to work with RDRAM and RDRAM's clock is 800 MHz.

But that's all changing: Intel just announced a P4 which will use a 533 MHz FSB. That clock rate makes no sense whatever for use with RDRAM but is beautifully designed to work with DDR-SDRAM, and in particular with the upcoming QDR-SDRAM. Intel also made a deal with RAMBUS recently which, effectively, paid them off. Their contract had prevented Intel from supporting DDR until 2003, but now Intel will support DDR beginning in 2002 and maybe even sooner than that. Whatever it was that RAMBUS had hold of (Intel's short-and-curlies) their grip seems to be loosening. It's evident that Intel is backing away as fast as they legally can. (discuss)

Captured by MemoWeb from http://denbeste.nu/entries/00000789.shtml on 9/16/2004