272 lines
6.9 KiB
ArmAsm
272 lines
6.9 KiB
ArmAsm
/*
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* This file is part of the COMROGUE Operating System for Raspberry Pi
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*
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* Copyright (c) 2013, Eric J. Bowersox / Erbosoft Enterprises
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* All rights reserved.
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*
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* This program is free for commercial and non-commercial use as long as the following conditions are
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* adhered to.
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*
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* Copyright in this file remains Eric J. Bowersox and/or Erbosoft, and as such any copyright notices
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* in the code are not to be removed.
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*
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* Redistribution and use in source and binary forms, with or without modification, are permitted
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* provided that the following conditions are met:
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*
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* * Redistributions of source code must retain the above copyright notice, this list of conditions and
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* the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and
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* the following disclaimer in the documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* "Raspberry Pi" is a trademark of the Raspberry Pi Foundation.
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*/
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#define __COMROGUE_PRESTART__
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#include <comrogue/internals/asm-macros.h>
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#include <comrogue/internals/layout.h>
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#include <comrogue/internals/mmu.h>
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#include <comrogue/internals/sctlr.h>
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/*------------------------------------------------------------------------------------------
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* The prestart code that gets control when the kernel is first loaded; its objective is to
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* set up the MMU and hand over control to the actual start code.
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*------------------------------------------------------------------------------------------
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*/
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.section ".first.text"
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.globl COMROGUEPrestart
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/* On entry: r0 = 0, r1 = machine type, r2 = atags address */
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COMROGUEPrestart:
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/* Initialize a temporary stack area. */
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mov ip, # PHYSADDR_LOAD
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sub sp, ip, #4
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/* Go collect the startup info. */
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bl KiCollectStartupInfo
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mov r11, r0 /* r11 = address of startup info structure */
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/* at this point r0-r2 are free for other code to use */
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/* Early trace initialize; we reinitialize it later. */
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bl ETrInit
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ldr r0, =.initMessage
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bl ETrWriteString8
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/* Copy the early vector table into place, including the vector words that live after the table itself. */
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ldr r0, =.earlyVectorTable
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ldr r1, =.earlyVectorTableEnd
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mov r2, #0
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b .vec1
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.vec0:
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ldm r0!, {r3-r6} /* copy 16 bytes at a time */
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stm r2!, {r3-r6}
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.vec1:
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cmp r0, r1
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bne .vec0
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/* Initialize early memory management (the TTB1). */
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mov r0, r11
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bl EMmInit
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mov r10, r0 /* r10 = address of TTB */
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/* Set up and start the MMU. */
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mov ip, #0
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mcr p15, 0, ip, c7, c7, 0 /* clear caches */
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mcr p15, 0, ip, c8, c7, 0 /* clear TLB */
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mov ip, #1
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mcr p15, 0, ip, c2, c0, 2 /* set TTBCR */
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mvn ip, #0
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mcr p15, 0, ip, c3, c0, 0 /* configure domain 0 = client, all others = invalid */
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mcr p15, 0, r10, c2, c0, 0 /* set TTB0 */
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mcr p15, 0, r10, c2, c0, 1 /* set TTB1 */
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mrc p15, 0, ip, c1, c0, 0 /* get control register 1 */
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orr ip, ip, # SCTLR_M /* MMU = on */
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orr ip, ip, # SCTLR_XP /* subpage AP bits disabled in 2nd-level page tables */
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instr_barrier
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mcr p15, 0, ip, c1, c0, 0 /* store control register 1 */
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mrc p15, 0, ip, c0, c0, 0 /* read ID register */
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instr_barrier
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#if 0
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ldr r0, =.msg1
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bl ETrWriteString8
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#endif
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/* now go to the start area in kernel space */
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mov r0, r11
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ldr ip, =COMROGUEStart
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mov pc, ip
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#if 0
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.balign 4
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.msg1:
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.asciz "got here 1\n"
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.balign 4
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#endif
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/*-------------------------------------------------------------
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* Early exception-handler code, mainly for debugging purposes
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*-------------------------------------------------------------
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*/
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.earlyReset:
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ldr r0, =.resetMessage
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b .earlyFUBAR
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.earlyUndef:
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ldr r0, =.undefMessage
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b .earlyFUBAR
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.earlySVC:
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ldr r0, =.svcMessage
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b .earlyFUBAR
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.earlyPrefetch:
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ldr r0, =.prefetchMessage
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b .earlyFUBAR
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.earlyData:
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ldr r0, =.dataMessage
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b .earlyFUBAR
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.earlyHyp:
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ldr r0, =.hypMessage
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b .earlyFUBAR
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.earlyIRQ:
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ldr r0, =.irqMessage
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b .earlyFUBAR
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.earlyFIQ:
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ldr r0, =.fiqMessage
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.earlyFUBAR:
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bl ETrWriteString8
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.hang:
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wfe
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b .hang
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.earlyVectorTable:
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ldr pc, .resetVector
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ldr pc, .undefVector
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ldr pc, .svcVector
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ldr pc, .prefetchVector
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ldr pc, .dataVector
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ldr pc, .hypVector
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ldr pc, .irqVector
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ldr pc, .fiqVector
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.resetVector:
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.word .earlyReset
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.undefVector:
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.word .earlyUndef
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.svcVector:
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.word .earlySVC
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.prefetchVector:
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.word .earlyPrefetch
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.dataVector:
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.word .earlyData
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.hypVector:
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.word .earlyHyp
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.irqVector:
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.word .earlyIRQ
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.fiqVector:
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.word .earlyFIQ
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.earlyVectorTableEnd:
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.balign 4
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.initMessage:
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.asciz "COMROGUEPrestart\n"
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.balign 4
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.resetMessage:
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.asciz "+++ RESET!!!\n"
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.balign 4
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.undefMessage:
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.asciz "+++ UNDEF!!!\n"
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.balign 4
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.svcMessage:
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.asciz "+++ SVC!!!\n"
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.balign 4
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.prefetchMessage:
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.asciz "+++ PREFETCH!!!\n"
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.balign 4
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.dataMessage:
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.asciz "+++ DATA!!!\n"
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.balign 4
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.hypMessage:
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.asciz "+++ HYP!!!\n"
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.balign 4
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.irqMessage:
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.asciz "+++ IRQ!!!\n"
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.balign 4
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.fiqMessage:
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.asciz "+++ FIQ!!!\n"
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/*--------------------------------------------------------------------------------------
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* Low-level IO functions that are placed here to make them callable from prestart code
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*--------------------------------------------------------------------------------------
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*/
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.section ".text"
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/*
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* Writes a 32-bit word of data to a memory-mapped IO port.
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*
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* Parameters:
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* - paPort = Physical address of the IO port to write to.
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* - uiData = Data to be written.
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*
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* Returns:
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* Nothing.
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*
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* Side effects:
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* Writing to any given IO port may have arbitrary side effects.
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*/
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.globl llIOWritePA
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llIOWritePA:
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str r1,[r0]
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bx lr
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/*
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* Reads a 32-bit word of data from a memory-mapped IO port.
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*
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* Parameters:
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* - paPort = Physical address of the IO port we read from.
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*
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* Returns:
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* The word of data read from the IO port.
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*
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* Side effects:
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* Reading from any given IO port may have arbitrary side effects.
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*/
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.globl llIOReadPA
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llIOReadPA:
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ldr r0,[r0]
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bx lr
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/*
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* Delays for a certain number of cycles, to allow an IO operation to work.
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*
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* Parameters:
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* - uiTicks = The number of "ticks" to delay.
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*
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* Returns:
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* Nothing.
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*/
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.globl llIODelayPA
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llIODelayPA:
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push {lr}
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.delaytop:
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nop
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nop
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bl .delayreturn
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nop
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nop
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subs r0, r0, #1
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bne .delaytop
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pop {lr}
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.delayreturn:
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bx lr
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